The fixed part consists of programmable components such as microprocessors and coprocessors.
Next, we consider the design space of programmable components. A key observation is that there is a trade-off between flexibility and efficiency — with efficiency either in the sense of performance, or else in the sense of energy-consumption.
A Practical Introduction to Hardware/Software Codesign
A third part in this chapter will define the abstraction levels of hardware and software for the purpose of this book. And finally, we will also define three terms that play a vital role in this book, namely the terms concurrent, parallel, and sequential. By nature, hardware is parallel and software is sequential. As a result, software models C programs are not very well suited to capture hardware implementations, and vice versa, hardware models RTL programs are not a good abstraction to describe software.
Practical Introduction to Hardware/Software Codesign (eBook)
However, designers frequently encounter situations for which a given design may use either hardware or software as a target. Trying to do both writing a full C program as well as a full hardware design is not an option; it requires the designer to work twice as hard. An alternative is to use a high-level model, which enables the designer to express a design without committing to a hardware or a software implementation.
Using a high-level model, the designer can gain further insight into the specification, and decide on the right path for implementation. The data flow model of computation is fully concurrent, and it is not committed to either a sequential or parallel implementation. Therefore, a single specification can be used to target software as well as hardware. This chapter describes the implementation of data flow systems in hardware and software on three different design targets.
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The first target is a software implementation of the data flow graph. Appropriate software scheduling techniques are needed to implement the data flow schedule.
The second target is a fully parallel hardware implementation of the data flow graph. In this implementation, each actor maps into a separate hardware module, and individual modules synchronize through their token communications. The third target is hybrid: a combination of software and a hardware coprocessor. In this case, a data flow graph is partitioned over hardware and software. This chapter demonstrates the flexibility and convenience of a data flow specification under multiple targets.
In the previous chapter, we discussed the data flow model of computation. Fundamental to this model is the decomposition of a system into individual nodes actors , which communicate through unidirectional, point-to-point channels queues. The resulting system model is represented as a graph.
The data flow model of computation describes concurrent computations. We discussed techniques to create a hardware or a software implementation starting from the same data flow model. The datapath receives commands from the controller and performs operations as a result of executing those commands.
The controller uses the results of datapath operations to make decisions and to steer control flow. Finally, we will also describe a few formal properties of the FSMD model, and we will define a proper FSMD as one which leads to a race-free and deterministic hardware implementation. If I were an engineer or engineering manager who wanted to learn more about codesign from a very practical perspective, I would read this book first before any other. When I first started learning about codesign as a practitioner, a book like this would have been the perfect introduction.
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A Practical Introduction to Hardware/Software Codesign | SpringerLink
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